OpenHW industrial grade, open source RISC-V Cores for EVERYONE
summary
OpenHW provides industrial RISC‑V cores under Apache-2 licensed cores with SystemVerilog implementations, UVM verification IP and FPGA images, claiming over 500+ million shipped across CV32, CV32E4 and CVA6 families. Toolchain support includes GCC and LLVM, Linux support on CVA6 with multi‑core and cache coherency options, tape‑outs via GlobalFoundries shuttles, and a TRL goal of moving cores from prototype to TRL‑5 ready for commercial integration.
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chapters (7)
- 0:00Introduction and OpenHW Group
- 2:34Why choose OpenHW RISC-V cores
- 5:22OpenHW Group products overview
- 8:13OpenHW Group organization
- 11:44Industrial usage and verification
- 13:13Core family overview
- 15:20Q&A and resources
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