Lightning Round

on YouTube ↗11m

" summary

Quick briefs on concrete claims and demos: a CPU-IP vendor lists 30 RISC‑V cores, 400 commercial licenses, 580 staff with 80% R&D and 14 billion chips shipped; a tooling firm explains using virtual platforms for early software bring‑up while the ISA added 14 extensions last year; a trace vendor offers a cycle‑accurate instruction trace encoder and helped define RISC‑V Efficient Trace; Synopsys shows 2 nm reference flows and ARC‑5 IP; tempo offers RISC‑V secure enclave IP and full HSM/provisioning plus certification services; TII taped out Shahin and Alacer testchips.

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" chapters (8)

1. 0:00Introduction and company overview
2. 1:53RISC-V ISA and software evolution
3. 2:55Virtual platforms for RISC-V development
4. 4:00Tessent EDA analytics for RISC-V
5. 5:51New RISC-V development board
6. 6:34Synopsys solutions for RISC-V
7. 8:01Tempo Secure’s RISC-V security IP
8. 10:10Technology Innovation Institute’s RISC-V research

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