How PULP-based Platforms are Helping Security Research
summary
Describes use of PULP-based platforms (open-source low-power RISC-V microcontroller systems) as testbeds for security research, showing how their architecture and toolchain enable experiments in hardware/software security. Covers concrete examples of experiments and measurement approaches using PULP hardware and associated development tools.
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chapters (14)
- 0:00Intro
- 1:23The entire system needs to be considered for security
- 3:23RISC-V open systems are an asset for security research
- 3:53ETH Zürich has a rich history in Cryptographic Hardware
- 4:40Key challenge: get enough data for your crypto units
- 5:15PULP provides multiple opportunities to add extensions
- 6:54Fulmine: Our loT processor with accelerators
- 7:45Side channel attacks are a maior problem for security
- 8:25Leakage Resilient Cryptography in a PULP accelerator
- 10:45Attacks that target the control flow are a serious problem
- 11:11Sponge based control flow protection (SCFP) Encrypted
- 12:30Modified R15CY core (REMUS) with Control Flow Integrity
- 13:13Patronus: PULPissimo chip with Control Flow Integrity
- 14:51QUESTIONS?
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