HiFive Unleashed Expansion Options and Capabilities

on YouTube ↗16m

" summary

Expansion kit attaches to the HiFive Unleashed via an FMC and exposes a Microsemi PolarFire FPGA PolarFire FPGA (300,000 LEs) plus a preloaded PCIe root complex and a chip link memory‑mapped interface so custom peripherals and accelerators sit on the RISC‑V system bus. Board includes x16 and x1 PCIe slots, HDMI, USB and SD, and ships with an Unleashed SDK on Crowd Supply (MSRP $19.99). Demo runs Doom and a convolutional neural network object detector using Debian Linux, OpenCV, V4L, all moved off the PC onto the RISC‑V cores.

AI-written summary · about

" chapters (14)

1. 0:00Intro
2. 0:22Agenda
3. 0:59RISC-V Marketing Update
4. 2:33Embedded OS Backdrop
5. 3:53Mi-V Eclipse Based IDE
6. 4:32Mi-V HiFive Unleashed Expansion: Advancing the Ecosystem
7. 5:16PolarFire HiFive Unleashed Development Platform
8. 6:15Microsemi Mi-V HiFive Unleashed Expansion Board
9. 6:40PolarFire Mi-V HiFive Unleashed Development Platform
10. 7:23HiFive Unleashed + Unleashed Expansion Board
11. 9:06ASIC Design Services
12. 10:04Core Deep Learning Block Diagram
13. 10:48PolarFire Tiny Yolo Video
14. 12:59Resources

" related talks

• 17mMi-V RISC-V Embedded EcosystemKrishnakumar Ranamoorthi · RISC-V Workshop Chennai 2018
• 10mSiFive Development ToolsDany Nativel · RISC-V at embedded world 2024
• 29mAccelerating the RISC-V Revolution: Unleashing Custom Silicon with Revolutionary Design PlatformsHuzefa Cutlerywala · RISC-V Workshop Chennai 2018
• 10mIntroducing the Highest Performance RISC-V Development B...Sam Grove, Nikhil Krishna Gopalakrishna · RISC-V Summit 2022
• 37mKeynote: RISC-V Launchpad ShowcaseTiffany Sparks · RISC-V Summit North America 2023
• 01h 00mHow to run Linux on RISC-V (with open hardware and open source FPGA tools)Drew Fustini · foss-north 2020
• 20mDemo: LED Cube Using RISC-V®-Based PolarFire® SoC FPGAKrishnakumar R · RISC-V Summit North America 2025
• 24mCelerity: An Open Source 511 Core RISC V Tiered Accelerator FabricMichael Taylor · 7th RISC-V Workshop 2017