Foundational HPC Systems for 2020 and Beyond
summary
Proposes a concrete path to RV128 with segmented 128-bit virtual addresses to address more than an exabyte, preserve RV64 binary compatibility via 64→128 mappings, and treat kernel space as object zero to prevent speculative access. Recommends per-subroutine multiple branch target caches, separates speculative versus operational cache state, uses hardware encrypted memory keys per object, and adds a hardware shadow stack; shows why flat 64-bit spaces enable Spectre/Meltdown style leaks.
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chapters (12)
- 0:00Introduction
- 1:15Architecture 1 Zero
- 5:08Memory State
- 7:17RV64 Compatibility
- 8:12RV128 Compatibility
- 8:52Secure Architecture
- 9:40Reference Paper
- 9:58Fix
- 10:31Branch Target
- 10:58Meltdown
- 12:25Hardware
- 13:06Summary
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