Ariane: An Open Source 64-bit RISC-V Application Class Processor and latest Improvements
summary
Ariane is a 64-bit RISC-V application core that implements the privileged spec and targets Linux, occupying about 185 kilo gates with a six‑stage in-order pipeline, scoreboard reorder buffer and simple renaming. L1 I/D caches are merged as virtually indexed physically tagged and a return address stack raises Dhrystone IPC by ~20%. A complete SSC with 1 GB DDR boots BusyBox Linux on FPGA — booted Linux on FPGA after four to five months of work — and the tapeout closes timing at around 910 MHz (SSD numbers).
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chapters (12)
- 0:00Introduction to Ariane
- 1:24Core Design Goals and Specs
- 4:49Implementation and Pipeline
- 6:13Verification and Open Source
- 8:03Performance Improvements
- 10:44Physical Design Challenges
- 12:01Proof of Concept and Debug
- 13:02Booting Linux and ASIC
- 14:07Tape-out and Future Projects
- 16:46Floating Point and Features
- 18:39Roadmap and Conclusion
- 19:33Q&A Session
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