Keynote: European Processor Initiative & RISC-V
summary
European Processor Initiative describes building a European CPU and accelerator stack for HPC and supercomputers using RISC‑V core design plus vector + accelerator tiles, coordinated by Barcelona Supercomputing Center and a Center of Excellence. Project targets a prototype within about three years, aims to serve Euro exascale and midrange systems, and operates under Horizon 2020 frameworks with modest initial grants (mentions figures like less than 10 million for early phases). Slides available at riscv.org/2018/05/.
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chapters (5)
- 0:00Introduction and welcome
- 3:53European Processor Initiative overview
- 14:15Supercomputer applications and projects
- 24:51RISC-V and open-source collaboration
- 30:07Q&A and closing remarks
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