Onboarding Verilog Peripherals to Rocket Chip

on YouTube ↗19m

" summary

Rocket Chip integration workflow that automates Verilog IP onboarding using a machine-readable DO manifest plus repo orchestration with wit repo manager and composable builds via wake dependent job execution. It claims to turn multi–person-year manual work into reproducible steps that generate memory maps, DTS, drivers, docs, and verification assets, enable shared build caching and parallel CI, and let a peripheral validated on a single Rocket test socket plug into multicore Linux-capable SoCs with no manual rework.

AI-written summary · about

" chapters (14)

1. 0:00Introduction
2. 0:50Why do we care
3. 1:33Open Source Hardware
4. 2:49Software Innovation
5. 3:37Onboarding IP
6. 5:20Onboarding Vision
7. 6:22Federation
8. 6:55Purpose
9. 7:38Wit
10. 8:49Smaller Pieces
11. 9:57Du
12. 11:58Wake
13. 12:55Wake Features
14. 14:52Rocket Chip

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