Open Source Chip Design in the European Semiconductor Strategy
summary
Europe now has an end-to-end open source chip: Basilisk SoC is taped out in IHP 130 nm BiCMOS, uses a CVA6 core, runs Linux and publishes GDS2 and RTL. The flow uses open tools (OpenROAD, Yosys and friends) and validated manufacturing at IHP. Google/SkyWater’s 130 nm PDK and the Tiny Tapeout service enable affordable runs. A €20M EU call (matched to €40M total) funds digital, analog and productivity tooling.
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chapters (12)
- 0:00Introduction and background
- 1:20Open source silicon overview
- 2:58Chip design ambitions in Europe
- 5:35Open source roles in RISC-V
- 9:18Categorizing open source design
- 12:38Challenges in hardware design
- 14:10Education and talent development
- 18:12Open source design IP and EDA
- 20:41Strategic funding and roadmaps
- 23:38Policy actions for European chips
- 27:34Manufacturing and access
- 29:42Demystifying chip design
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