μShell: A Microkernel-based FPGA Shell Architecture
Talkat 20th USENIX Symposium on Operating Systems Design and Implementation (OSDI '26) · 2026-07-13..07-15·
summary
MicroShell implements a microkernel-style FPGA shell with a hardware capability enforcement unit, a dynamic data interconnect, and a software capability manager plus component-aware scheduling. Prototype runs on an AMD host with an Alveo U280 and compares to Coyote V2; throughput stays nearly identical despite partitioning, deployment latency drops by orders of magnitude when sharing modules, reconfigurations fall up to 79% and deadline misses drop up to 69%. Source, artifact and evaluations are publicly available.
AI-written summary · about
chapters (15)
- 0:00Introduction
- 1:01FPGA shell limits
- 2:49Monolithic model problems
- 3:32Desired modular shell gaps
- 4:16Problem and μShell proposal
- 4:57μShell design principles
- 5:39Capability-based isolation
- 7:27Secure IPC mechanism
- 8:34Component-aware scheduling
- 9:58μShell workflow
- 11:01Evaluation setup
- 12:06Performance results
- 12:46Cost reduction
- 13:09Scheduling efficiency
- 13:50Summary and future work
related talks
09mNutshell: A Linux-Compatible RISC-V Processor Designed by Undergraduates
11mQEMU Based Hardware Modeling Of A Multi Hart RISC V Based FPGA With Execution Contexts Free...
12mDay 2 Keynote Demonstration
30mSoftware architecture for High-end IoT devices
34mMicrowatt Microarchitecture
22mOld School cache coherence-a snooping system for a multicore processor based on CVA6
39mSoftware Defined Hardware on Heterogeneous SoCs Using OpenAMP
16mSoftware-driven Hardware in the Data Center: LibreBMC, Renode, RowHammer...