Day 2 Keynote Demonstration
summary
Announces a tiny OpenPOWER soft core called microwatt, written in VHDL 2008 and simulated with GHDL then synthesized with the vendor toolset (demo uses Vivado/Vado), boots a ported MicroPython RAM image, and runs on a Xilinx FPGA. The design is a single-issue, in-order scalar fixed-point subset of Power ISA, fits 40 cores on one FPGA, runs real instructions, implements a Hello World accelerator, and currently lacks a hardware divide.
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