Hands-on Introduction to CHERI
summary
Hands‑on workshop demonstrates CHERI capability pointers on a real Sonata FPGA board using chariot RTOS and an LLVM toolchain that produces UF2 images; participants compile examples, program the board, and see a compartmentalized LED demo that faults one compartment while leaving others running. The session shows a static JSON report plus chariot audit Rego checks that flag incorrect access, cites >50% of critical CVEs still memory‑related, and notes ~15 years of CHERI research plus iCE40 silicon prototypes.
AI-written summary · about
chapters (8)
- 0:00Introduction to CHERI
- 1:11What is CHERI?
- 13:08CHERI fundamentals
- 22:20CHERI protection model
- 36:36Hands-on workshop setup
- 46:17Hardware access control demo
- 1:08:22Compartmentalization and policy
- 1:28:09Q&A and resources
related talks
20mMaking CHERI Accessible
15mSonata: A development platform to enable exploring the use of CHERI for embedded applications
22mIntroduction to Project CHERIoT
11mFast and fine-grained compartmentalisation in CHERI
10mCHERI in out-of-order microarchitectures
31mMemory Safety: The Pernicious Challenge
23mInterpreter Memory Safety via Differential Fuzzing with a CHERI on Top
11mDemo: Securely Booting CHERI on a Full OS to Prevent Buffer Overflow Attacks