Building Cache Coherent, Heterogeneous-ISA Processors Using P-Mesh

on YouTube ↗26m

" summary

P-Mesh gets reworked to be ISA-agnostic by adding a simple Transaction-Response Interface and L2/LLC support for ISA-specific atomics, connecting more than 10 cores across five ISAs and scaling conceptually to half a billion cores. The team wires cores (T1, Ariane, MicroWatt, BlackParrot, ao486, etc.), boots SMP Linux via a generated boot ROM, and demonstrates a working heterogeneous system called Juxtapeton using P-Mesh with low-latency coherent shared memory.

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" chapters (20)

1. 0:00Introduction
2. 1:07What is PMesh
3. 3:01Why build heterogeneous ISAs
4. 4:05Application affinities
5. 5:18Architecture research
6. 5:45Heterogeneous ISA
7. 6:35Bring Your Own Core
8. 8:21Openpton
9. 11:00Open Piton
10. 11:32Option A
11. 12:17Option B
12. 12:48Option C
13. 13:19Tree
14. 13:54Cores
15. 17:17ETH Zurich
16. 18:30ariane
17. 19:07Additional modifications
18. 20:02Application class courses
19. 21:20Demo
20. 23:58Future Goals

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