RISC-V in Space (The Canadian version)
summary
An open-source RISC-V microcontroller is fabricated into silicon, radiation-hardened with a University of Saskatchewan process tweak that keeps cell geometry but adds stacked transistor latches, and tested with heavy-ion beams at Texas A&M and focused-ion facilities — the same board travels between UBC, Saskatchewan, Kingston, Texas, and Sydney. The design uses the OpenHW CV32E40P MCU as its core, plans a V2 with TMR and ECC scrubbing, and publishes RTL and board artifacts for forking.
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chapters (7)
- 0:00RISC-V in space intro
- 1:23Open Hardware Foundation RISC-V cores
- 3:10Popular RISC-V cores features
- 8:13Core 5 MCU ecosystem
- 10:01StarRISC for space apps
- 13:11How to get involved in Canadian RISC-V development
- 19:15Q&A on RISC-V cores
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