~/talk

The role of software in validating silicon IP

Talkat Week of Open Source Hardware 2019 · 2019-06-13..06-14· [testing]
links:none on file
slides:none on file

Claims that software-only validation missed 13 missing instructions in OpenRISC when the compiler never emitted them, prompting a full UVM analysis; hybrid modeling combines fast QEMU/Renode or Spike-level models with cycle-accurate Verilator/GHDL/iverilog peripherals to run real OS and compiler test suites pre-silicon. A lockstep debugging gdb-server compares golden-reference and target models instruction-by-instruction so divergences raise immediate exceptions; this workflow finds tens of silicon bugs and enables first-silicon bring-up.

AI-written summary · about

  1. 0:00Intro
  2. 1:06Definitions
  3. 1:451999: The Original OR1200 Test Suite
  4. 2:302010: OVM Verification
  5. 2:58The Lesson
  6. 3:23Software Verification of HW
  7. 4:06Types of Software Simulator
  8. 6:53The Virata Helium 210
  9. 7:57Hybrid Modeling
  10. 9:28The Software Testing Framework
  11. 10:15Comparative Regression Testing: TechEdSat
  12. 12:35Making Comparative Testing Easier
  13. 14:46Conclusions
  14. 16:36Lockstep Debugging
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