The role of software in validating silicon IP
summary
Claims that software-only validation missed 13 missing instructions in OpenRISC when the compiler never emitted them, prompting a full UVM analysis; hybrid modeling combines fast QEMU/Renode or Spike-level models with cycle-accurate Verilator/GHDL/iverilog peripherals to run real OS and compiler test suites pre-silicon. A lockstep debugging gdb-server compares golden-reference and target models instruction-by-instruction so divergences raise immediate exceptions; this workflow finds tens of silicon bugs and enables first-silicon bring-up.
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chapters (14)
- 0:00Intro
- 1:06Definitions
- 1:451999: The Original OR1200 Test Suite
- 2:302010: OVM Verification
- 2:58The Lesson
- 3:23Software Verification of HW
- 4:06Types of Software Simulator
- 6:53The Virata Helium 210
- 7:57Hybrid Modeling
- 9:28The Software Testing Framework
- 10:15Comparative Regression Testing: TechEdSat
- 12:35Making Comparative Testing Easier
- 14:46Conclusions
- 16:36Lockstep Debugging
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