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DSA-2LM: A CPU-Free Tiered Memory Architecture with Intel DSA

on YouTube 17m
Talkat USENIX ATC '25 · 2025-07-07..07-09· [linux-and-operating-systems]

speakers

name:Ruili Liu
links:none on file
name:Teng Ma
links:none on file
name:Mingxing Zhang
links:none on file
name:Jialiang Huang
links:none on file
name:Yingdi Shan
links:none on file
name:Zheng Liu
links:none on file
name:Lingfeng Xiang
linkedin:lingfeng-xiang
name:Zhen Lin
links:none on file
name:Hui Lu
links:none on file
name:Jia Rao
links:none on file
name:Kang Chen
links:none on file
name:Yongwei Wu
links:none on file

resources

video:https://youtu.be/CGmfFBJVhuQ
slides:none on file

summary

DSA-2LM integrates Intel DSA into Linux kernel page migration, bypasses VA translation to submit physical addresses, and implements a concurrent migration workflow plus an adaptable aggregation algorithm that slices 2 MB pages across multiple works (four works hits near-peak) and groups 4 KB pages into batches (batch size ≈8). It achieves 15–17× higher copy throughput vs a CPU core for continuous migrations, cuts kernel migration CPU from 34% to 4.2%, and yields 12–52% application speedups. bypass VA translation aggregate 4KB batches across works

AI-written summary · about

chapters (8)

  1. 0:00DSA-2LM architecture intro
  2. 1:43Traditional page migration challenges
  3. 3:34CPU-free migration with Intel DSA
  4. 7:06DSA migration challenges
  5. 10:19Concurrent migration workflow
  6. 13:14Evaluation setup and workloads
  7. 15:46Results and performance
  8. 16:09Conclusion and future

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