RISC-V customization, HW/SW co-optimization, and custom compute
summary
Argues that adding custom instructions to RISC‑V yields both flexibility and fixed‑function performance, using a workflow that profiles actual software and generates RTL plus an entire SDK (profiler, compiler, debugger). Claims a starting IP with hundreds of engineer years accelerates design and a tool called Studio profiles workloads and outputs suggested customizations. Notes security gains because about 70% memory bugs cause vulnerabilities and customization can hide/mitigate attack surfaces.
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chapters (5)
- 0:00Introduction
- 1:44RISC-V customization benefits
- 3:53Shift left co-optimization
- 6:46Industry skill scarcity solutions
- 9:35Custom compute future outlook
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