Ten Years of PULP: The Evolution of the Species from IoT to HPC
summary
Project PULP evolves from tiny IoT cores into cluster-based HPC demonstrators, producing multiple taped-out silicon generations (Vega, Marcellus, GAP9) and growing from ~5–6 to ~20–30 contributors. Key claims: 1 MB on-chip eMRAM enables storing neural-network weights; MobileNet runs on-device via a Torch→hardware mapping and GCC-based toolchain; DSP and NN accelerators integrate with RISC-V Ariane cores; GlobalFoundries tapes and HyperRAM enable Linux-capable boards. Verification uses SystemVerilog testbenches and software regression suites; GAP9 reaches commercial deployment.
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chapters (10)
- 0:00PULP introduction
- 4:12PULP origins
- 10:19PULP community growth
- 16:52Vega and Marcellus chips
- 25:47Transition to high-performance computing with Ariane
- 33:21Wireless and server CPUs
- 39:16Automotive PULP designs
- 45:24Parallel and vector extensions
- 51:59Verification in PULP
- 54:01PULP future challenges
