Day 1 Keynote
summary
Microchip unveils the SMC1000 smart memory controller that puts the memory controller off‑chip and connects to Power9 with 8×25 G OMI to a 72‑bit DDR4‑3200 DRAM interface. It claims to replace a 288‑pin DDR4 channel with an 83‑pin serial link and to quadruple bandwidth per channel, enable media independence (DRAM or storage‑class memory), and ship as DIMMs in 1U and 2U form factors with samples available now.
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chapters (8)
- 0:00Intro
- 0:16About Microsemi
- 0:49Data Center Solutions
- 2:40Smart Memory Controller
- 3:29Memory Infrastructure
- 5:00Key Trends
- 5:49SMC1000
- 8:05Conclusion
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