Securing your next 96Boards design using Xilinx Zynq MPSoC
summary
Practical recipe for protecting Ultra96 designs using Xilinx Zynq UltraScale+ MPSoC components: authenticate and decrypt PL bitstreams via the CSU/FSBL chain, run ARM Trusted Firmware and U-Boot from on-chip memory, and store keys in eFUSE or battery-backed RAM (optionally paired with an Infineon SLV9670 TPM on a Pmod). Hardware crypto is AES-GCM-256, RSA-4096 and SHA3-384, measurable boot supports IEC 62443 workflows, and loading bitstreams from OCM trades security for slower boot times.
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chapters (4)
- 0:00Introduction and agenda
- 1:08History of security features
- 6:51Hardware root of trust
- 17:23Q&A session
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