Open Source Software Stack for Heterogenous embedded devices
summary
Heterogeneous Xilinx SoCs (Versal ACAP, Zynq MPSoC) require concrete runtime pieces: an OpenAMP clean‑room rpmsg/remoteproc implementation that lets non‑Linux RTOSes act as masters for lifecycle and messaging; a system device tree proposal that emits per‑domain device trees and prevents overlapping physical memory assignments; cache coloring in the Jailhouse hypervisor that yields deterministic real‑time latencies in tests with the University of Modena; and the Ultra96‑V2 $249 board with SDSoC license for hands‑on development.
AI-written summary · about
chapters (17)
- 0:00Intro
- 0:15The Future in Heterogenous SoCs
- 2:09FPGA: The "Chameleon" Chip
- 5:55CPU Architectures not Scaling with Workloads
- 7:00Example of Integration in Industrial Automation
- 9:28Execution Environments within Zync US+ MPSC
- 11:00Can We Simplify SW for Heterogenous Environments?
- 12:33OpenAMP Initiative
- 14:56System Device Tree to Device Trees
- 17:09Conceptual Allocation of Applications in Multicore Soc
- 19:52Cache coloring + Hypervisor
- 20:28Try out Heterogenous Compute Yourself
- 21:17Ultra96-V2 Kit Overview
- 22:12What about Multi-chip Heterogenous Systems Traditional Accelerator Attach
- 22:51Accelerators are Becoming Smarter
- 23:33CCIX: Virtualized, Coherent Accelerators
- 24:04The CCIX Consortium
related talks
39mSoftware Defined Hardware on Heterogeneous SoCs Using OpenAMP
29mIntroduction to OpenAMP
20mEnabling the Full Power of a Multiprocessor SoC
34mZephyr and OpenAMP
20mRedefining the Embedded Development Landscape with Software-defined SoCs
54mCombat complexity - build your own open OS and hardware
32mHeterogeneous Linux and RTOS Software Architecture for Low-Price RISC-V...
22mEnhancing OpenAMP: Making Linux and Zephyr Work Better Together