Heterogeneous Linux and RTOS Software Architecture for Low-Price RISC-V...
summary
Prototypes show a cheap heterogeneous RISC-V board (two cores on a $9 Micr5 Duo) running Linux on the big core and ThreadX on the little core with firmware loaded via remoteproc and messaging over RPMsg/virtio using shared memory and interrupts. Demo includes a ping‑pong reliability test and an LED blink control that works end‑to‑end, code and build instructions land on GitHub, and ADB is used to push images for automated remote core flashing.
AI-written summary · about
chapters (6)
- 0:00Heterogeneous Linux RTOS intro
- 2:50Asymmetric MP challenges
- 7:46OpenAMP for mixed criticality
- 10:34Intercore RPMsg Vert.IO
- 22:50Live demo Milk-V Duo
- 30:14Q&A
related talks
27mBuilding a Low-key XIP-enabled RISC-V Linux System
21mDeveloping with FreeRTOS and RISC V
01h 00mHow to run Linux on RISC-V (with open hardware and open source FPGA tools)
11mDemo: Heterogeneous Multicore Debugging of RISC-V Cores in Complex Chips
54mCombat complexity - build your own open OS and hardware
28mFree and Open Source Hardware to enable RISC-V IoT Applications With
43mEdge Computing with RISC-V Platforms Running XIP Linux
04mUsing the Rust Standard Library on High-End MCUs
