ABC: The Way It Should Have Been Designed
summary
ABC dates from 2005 and centers on And-Inverter Graphs (AIG) as a unifying data structure for synthesis, mapping and equivalence checking, with iterative DAG-aware rewriting that often beats one large pass. It maps to LUTs and standard cells, verifies transforms via built-in miter engines, and is integrated into yosys for parsing and flow support. Scalability claims: typical blocks at ~1M gates, demonstrated runs up to 100 million AIG nodes and a current package limit near half a billion.
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chapters (14)
- 0:00ABC introduction and history
- 1:05Logic synthesis and mapping
- 2:50Data structures evolution
- 4:36Boolean calculator and visualizer
- 6:22Rewriting and optimization
- 8:08Technology independent synthesis
- 9:12Standard cells and LUT mapping
- 10:35Advanced mapping choices
- 11:37Verification and equivalence checking
- 13:05AG package and structures
- 14:47Achievements and limitations
- 16:59Future research directions
- 18:44Support and resources
- 19:26Q&A: Tools and scalability
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