RISC-V International Security Overview
summary
RISC-V International publishes a stable crypto extension (crypto version 0.8.1) that adds small scalar instructions plus AES/SHA/SM3/SM4 accelerators and an entropy source, claiming 2x–10x speedups (AES up to 10x on RV64) while the dedicated crypto cost approximates a Rocket-core multiplier. Architectural validation tests (Apache‑2.0) run against simulators and check instruction encodings and signatures; SRT partners with HackerOne for coordinated vulnerability handling; guidance targets FIPS 140-3 certification via an OpenSSL FIPS provider and a kernel entropy interface.
AI-written summary · about
chapters (7)
- 0:00Introduction to RISC-V security
- 3:10Scalar cryptography extension overview
- 6:37Architectural validation for crypto
- 9:46Certification status of crypto
- 13:02Security response team introduction
- 16:53Blockchain SIG overview
- 20:06Summary and next steps
related talks
16mRISC-V Instruction Set Extensions for Cryptography - From Research to Standardization
19mAn Open Source Approach to System Security
13mRISC-V: Securing the Future of Open Source Computing
20mRISC-V open designs and contributions to hardware security research and development activities
13mUsing RISC V As a Security Processor For DARPA CHIPS And Commercial IoT
47mA Security RISC? The State of Microarchitectural Attacks on RISC-V
16mKeynote: NVIDIA’s secure RISC-V processor
16mKeynote: RISC-V Security - Current Initiatives and Future Trends
