Panamax FPGA - An Open Source FPGA on SKY130
summary
A full FPGA built in the Panamax padframe targeting the sky130 PDK: fabric with 64 I/Os, 1,280 LCs (LUT4+FF), 8 MACs, 16 small register files and 8 BRAM blocks plus analog IP (two 12‑bit SAR ADCs and two 8‑bit R‑DACs). Implemented with the Fabulous tiled flow and open source EDA (OpenLane/Libra + OpenROAD); analog macros required manual routing and abstract LEFs. Submitted for tapeout May 2025; SRAM macros may need fixes due to Skywater rule changes, die expected September 2025.
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chapters (6)
- 0:00Panamax FPGA project
- 0:25What is Panamax
- 1:30FPGA fabric architecture
- 3:39Analog IP integration
- 5:29Tapeout challenges
- 8:17Conclusion & Q&A
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