Lightning Talk: RISC-V and AI: How an Open-Standards ISA Underpins Portability f...

on YouTube ↗09m

" summary

RISC-V claims to make AI/ML kernels portable by standardizing two concrete extension types: an integrated matrix extension that reuses vector state for ~2–4× speedups and an attached matrix extension that adds a tiled accelerator with its own registers and memory ports aimed at data center, edge and HPC. Companies (Meta, Google, Stream Computing, Esperanto, Rivos, Softco) are taping out or shipping silicon; one configuration targets ~32–40 TOPS on 12 nm. The effort expects 95–98% shared infrastructure between vendors.

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