Open Acceleration for RISC-V – Portability, Performance and Partners...
summary
SYCL serves as an open standard alternative to CUDA that port applications to RISC‑V with SYCLomatic automated conversion, then auto‑tuning and targeted hand tuning to reach near‑equivalent or better performance. Codeplay provides ComputeCpp and supports Intel DPC++ oneAPI backends while targeting RISC‑V vector extensions RVV. Reports show about 90% automatic conversion rate (n‑body demo was 100% first pass) and large projects like US national labs migrated ~10 million lines using these tools.
AI-written summary · about
chapters (12)
- 0:00Importance of ecosystems
- 1:28Addressing vendor lock-in
- 3:02The role of SYCL standards
- 4:23Programming language options
- 5:59Industry adoption of SYCL
- 8:02SYCL on RISC-V platforms
- 9:36The migration process
- 11:57Performance validation
- 14:32Tools for code transition
- 17:39Supporting developer stacks
- 20:10Company expertise and scope
- 22:56Conclusion and takeaways
related talks
20mThe Journey to Enabling RVV Solutions with SYCL and the OneAPI Ecosystem
01h 01mTake Advantage of All the MIPS - SYCL & C++
25mDeep Dive: Accelerating Neural Networks using RVV and Open Standard Software
56m“Towards Heterogeneous Programming in C++"
01h 07mHeterogeneous Modern C++ with SYCL
09mLightning Talk: RISC-V and AI: How an Open-Standards ISA Underpins Portability f...
37mC++ for multi-accelerator, multi-vendor systems
01h 09mC++20 on Xilinx FPGA with SYCL for Vitis