Lightning Talk: The CFU: Custom Hardware with RISCV and Zephyr
summary
Demonstrates adding a Custom Function Unit into a RISC‑V core on an FPGA and calling it from Zephyr, using NeoRV32 on an OrangeCrab board so the design fits. Implements CFU via the RISC‑V custom0/custom1 opcodes and CFU intrinsics (assembly macros) from C, runs a simple Xia block cipher in hardware, and loads a Zephyr app that invokes the CFU and prints the results, showing the hardware/software path actually works end to end.
AI-written summary · about
chapters (6)
- 0:00Introduction
- 1:03Neo RV32 and Zephyr
- 2:28Custom Function Unit in RISC-V
- 4:15CFU implementation details
- 7:06Demo setup and Zephyr steps
- 8:10Future steps and applications
related talks
01h 19mMini-conference: RISC-V Support in Zephyr
30mCFU Playground: Model-specific Acceleration on FPGAs
09mLightning Talk: Using Embedded FPGAs for Custom Vector Extensions
24mUniversal Tools for Acceleration, Timing, Integration & Machine Enhancement
45mAutomated, Simulation-Based Flow for Low-Cost FPGA-Accelerated Devices with Z...
25mChallenging Hardware Contests With Zephyr and Lessons Learned
05mLightning Talks: Developing RV32G Processor model
30mSoC Development: From ROM to Application
