~/talk

SRNIC: A Scalable Architecture for RDMA NICs

Talkat NSDI 2023 · 2023-04-17..04-19· [networking, distributed-systems]
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name:Wenxue Li
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name:Peng Xie
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name:Tao Feng
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name:Ke Cheng
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name:Kejia Huo
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name:Pingbo An
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name:Kui Ji
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name:Bin Xu
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name:Tao Ding
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name:Kai Chen
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Presents SRNIC, an FPGA prototype RDMA NIC architecture that removes on‑chip structures via protocol header extensions, cache‑free QP scheduling, and memory‑free selective repeat to boost connection density. Implements QPC and MTT only on chip, uses host memory for bitmaps and RIT, and runs at 300 MHz. Achieves 10K performant connections, sustains 97 Gbps and 3.3 μs latency with <5% CPU overhead, and reports 18x normalized connection scalability versus commercial RNICs.

AI-written summary · about

  1. 0:00Intro
  2. 1:36RDMA becomes the de-facto standard for high-speed networks in modern datacenters
  3. 2:18Network Scalability Issue
  4. 3:41Connection Scalability Issue
  5. 5:19Idea & Design Principles
  6. 6:13Strategies to Minimize On-chip Data Structures
  7. 6:41Data Structures Involved
  8. 8:18Analysis & Optimization Ideas
  9. 8:51Cache-free QP Scheduler
  10. 9:45Bitmap Onloading
  11. 10:44Header Extensions
  12. 13:06Prototype Implementation
  13. 13:39Evaluation - Connection Scalability
  14. 14:32Evaluation - Performance & CPU Overhead
  15. 14:54Evaluation - Network Scalability
  16. 15:55Summary
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