Porting ML to RISC‑V: How Not to Lose Performance
summary
Examines porting machine-learning workloads to RISC-V processors, focusing on performance issues caused by limited bus bandwidth when using tensor or GPU accelerators. Describes strategies for addressing these bottlenecks on RISC-V-based CPUs to avoid losing performance when offloading computation to accelerators.
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chapters (4)
- 0:00ML and RISC-V intro
- 5:03Why RISC-V for ML
- 15:16Optimizing Eigen library
- 24:29RISC-V results and future
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