Achieving Wire-Latency Storage Systems by Exploiting Hardware ACKs
summary
Juneberry implements an Ordered Queue (OQ) that uses hardware ACKs as commit signals from RDMA NICs so clients commit neoex storage requests in one round trip with server CPU bypass while the server CPU executes requests asynchronously. It runs over RDMA RC with a shared receive queue placed in persistent memory for durability, maps requests to SRQ partitions, and enforces linearizability by ordering requests by RQ buffer positions. Implemented with commodity 100 Gbps RDMA NICs and integrated into Memcached and PMemKV, it cuts median write latency up to 90% versus eRPC and 83% versus deferred designs while adding overhead for read-heavy durable workloads.
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chapters (6)
- 0:00Introduction
- 3:10RPC vs one-sided RDMA limits
- 8:07Hardware ACKs bypass CPU latency
- 11:27Juneberry communication framework
- 13:02Performance evaluation
- 14:48Summary
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