PCSC: Caching PCI Config Space Accesses for faster Live Updates

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" summary

At scale PCI enumeration and VF creation trigger a flood of hardware config reads, so PCSC implements a per-device cache attached to struct pci_dev, intercepts pci ops, uses a write-invalidate policy for coherence, and dynamically infers cacheable registers by walking capability chains. Implementation preserves cache across kexec via Kernel HandOver (KHO) and reports ~70–80% hit rates on ARM testbeds, cutting VM bring-up blackouts by hundreds of milliseconds versus uncached probing. PCI Configuration Space Cache (PCSC) is upstream-RFCed and prototyped in-kernel.

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" chapters (10)

1. 0:00Introduction and motivation
2. 1:06PCI config space challenges
3. 2:13Cache design and implementation
4. 3:39Current status and RFC details
5. 4:43Discussion on access sources
6. 6:30Comparison with existing mechanisms
7. 8:14Handling map bus and caching
8. 9:20Alternatives and risks
9. 10:21VFIO and snapshot preservation
10. 11:04Q&A and conclusion