Introduction to eBPF Load-Acquire and Store-Release Instructions
summary
Adds two BPF_ATOMIC ops providing load-acquire and store-release semantics, available in LLVM 21+ and merged into mainline kernel with support for arm64, x86-64, riscv64 and ppc64. Instructions encode as stx atomic with immediate fields, accept 8/16/32/64 sizes, and subword loads zero-extend. Compiler needs -mcpu=v4 to emit V4 BPF, verifier rejects unaligned accesses and 64-bit acquires on 32-bit kernels, and JITs map to LDAR/LDAPR on arm64 (LDAR chosen) and plain aligned loads/stores on x86-64. -mcpu=auto probing is still limited.
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chapters (8)
- 0:00Introduction to eBPF LA/STL
- 2:56Why load acquire and store release
- 9:40Memory model benefits on ARM64
- 10:00Encodings and usage in BPF
- 15:05Compilation to native instructions
- 20:49Kernel verifier and JIT details
- 24:05Potential future work
- 25:52Q&A session
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