PyLSE: A Pulse-Transfer Level Language for Superconductor Electronics
summary
A Python DSL called PyLSE lets designers write pulse-based superconducting circuits as pulse machines with explicit setup/hold and propagation delays, a 16-cell library and user-extensible cells. Designs simulate far more compactly (example: ~81 lines of SPICE vs ~6 lines PyLSE) and visual traces match SPICE. PyLSE compiles to timed automata and verifies with oopal model checker—basic cells verify in <1s with <60 states on average, but model checking times out on larger examples like an 8-bit bitonic sorter.
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chapters (16)
- 0:00Introduction
- 0:15Context
- 1:02Transient Pulses
- 2:31Superconductor Circuits
- 4:17Our Approach
- 4:58Pulse Machine
- 5:25Library
- 6:08Programming
- 6:55Memory
- 7:27Spice
- 8:32Operational Semantics
- 8:49Time Automata
- 9:46Opal
- 11:33Summary
- 12:05Future work
- 12:54Questions
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