On the Generality of Matrix Multiplication
summary
Claims a concrete mapping from a Turing-complete one-instruction-set ISA into sequences of matrix multiplications and uses a Rosette-based synthesizer to generate the actual encodings. Demonstrates 2x2 matrix encodings that implement subtraction and bit shifts by placing constants in matrix entries and extracting the top-left result, explores block-diagonal speculative execution and coalescing to larger multiplies to reduce accelerator round trips, and notes practical limits from TPU quantization (4–8 bit packing prevents straightforward 32‑bit state) while leaving larger-bit and RISC-style mappings as ongoing work.
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chapters (10)
- 0:00Introduction
- 0:20Overview
- 0:40Outline
- 1:09History
- 1:55What are TPUs
- 3:19Program Synthesis Tool
- 5:06Subtraction
- 6:58TPU
- 7:43Optimization
- 8:57Use Cases
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