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Towards Practical Tools for Side Channel Aware Software Engineering...

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Presents a grey-box linear regression method that fits instruction-level power models for ARM Cortex-M0 and M4 using 5,000 traces per instruction and 1,000 traces per three-instruction sequence, sampled at 500 MS/s. Clustering reduces 21 instructions to five representatives; models include sequence-dependent interactions and adjacent-bit terms for shifts/mults. Integrates models into the ELMO emulator to simulate leakage, and reproduces a masked-AES leak confirmed by Welch t-tests with the usual 4.5 threshold.

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  1. 0:00Introduction
  2. 0:46Outline
  3. 1:26Aim
  4. 2:47Userfriendly diagnostic tools
  5. 3:00Whitebox modeling
  6. 3:44Side channel modeling
  7. 4:24Leakage factorizations
  8. 6:07Linear regression
  9. 7:27Model quality
  10. 8:56Fstatistic
  11. 10:26ARM CortexM
  12. 11:15ARM Instruction Sets
  13. 13:07N0 Implementation
  14. 14:00Leakage Testing
  15. 15:22Grouping
  16. 16:14Data dependent coefficients
  17. 20:15Correlation
  18. 21:05Leakage Detection
  19. 23:42Conclusion
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