NetVRM: Virtual Register Memory for Programmable Networks
Talkat 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22) · 2022-04-04..04-06·
summary
NetVRM provides a virtual register memory abstraction plus a P4VRM compiler that merges multiple P4 programs so on-chip register regions are remapped at runtime without recompiling, with a prototype on a 6.5 Tbps switch and a 4-switch emulation. It treats utility as memory hit ratio, classifies apps as elastic or inelastic, runs a network-wide allocator that finishes reallocation in ~10 ms, and reports a 1.6–2.2× improvement in mean satisfaction ratio under varied workloads.
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chapters (18)
- 0:00Intro
- 0:34Data plane objects
- 2:26Diminishing return
- 3:54Existing solutions and limitations
- 4:56Realizing dynamic register memory allocat
- 5:59Virtual register memory
- 6:37Address translation
- 7:39Problem formulation
- 8:05Scope of dynamic resource allocation
- 8:59Challenges for dynamic resource allocatio
- 9:21Memory hit ratio by default
- 10:50Online utility curve estimation
- 12:13P4VRM compiler
- 12:46Implementation
- 13:04Evaluation
- 13:16Control loop delay
- 15:05Impact of allocation epochs
- 15:23Conclusion
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