~/talk

PyTorch on RISC-V: From Cross-Compilation To Native CI

Talkat PyTorch Conference Europe 2026 · 2026-04-07..04-08· [devops-and-delivery]
links:none on file
slides:none on file

Porting PyTorch to RISC‑V moves from cross‑compilation to native CI by resolving concrete gaps: GCC/LLVM, Ubuntu 24.04 builds, OpenBLAS RVV support and upstream oneDNN work. A native build produces a 258 MB native wheel that runs, but tests lack scale and CI is immature — current native runs take about 10 hour native build on available machines. Performance lacks micro‑arch tuning (RVV vector kernels missing microarch tuning). RISC‑V runners exist as native GitHub runners (bare metal) and roadmap targets faster hardware, green CI labels, then full PR testing.

AI-written summary · about

  1. 0:00PyTorch and RISC-V intro
  2. 3:17What is RISC-V
  3. 6:47PyTorch dependency chain
  4. 8:33RISC-V in Linux distros
  5. 11:23Native PyTorch builds
  6. 12:04CI setup for RISC-V
  7. 13:51Community engagement
  8. 15:40Hardware acceleration gaps
  9. 17:30RISC-V for edge AI
  10. 18:52Help port libraries
  11. 20:01Q&A on toolchains
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