A Complete Re-Think for Memory Config...
summary
Panel claims memory interfaces consume orders more energy than compute and that redesigning them unlocks new architectures: local DRAM interfaces cost about DDR5 ~40 pJ/bit while HBM sits near HBM ~4 pJ/bit and LPDDR variants can hit ~10 pJ/bit; disaggregation shows big latency costs with reported experiments up to 900 ns, whereas protocol choices tradeoff roughly OMI ≈10 ns versus CXL ≈200 ns and controllers (RMI/OMI/CXL) determine whether pooled or near memory is practical.
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chapters (7)
- 0:00Introduction to memory panel
- 1:24Panelist introductions
- 6:17Energy per bit in memory systems
- 14:45Disaggregation and memory buffers
- 25:27Near vs far memory and latency
- 34:34Audience Q&A on OMI and CXL
- 45:29Closing remarks and thanks
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