Base Porting of Linux Kernel on RISC V Architecture

on YouTube ↗35m

" summary

Covers how to perform an initial Linux kernel port to RISC‑V boards, focusing on the minimal kernel support and hardware interaction needed for board bring‑up. Names and explains key kernel address macros (ZTEXT_ADDRESS, ZRAM_ADDRESS, ZBASE_ADDRESS) and minimal controller initialization steps used to get a RISC‑V board running Linux and aid early debugging.

AI-written summary · about

" chapters (13)

1. 0:00Intro
2. 3:15Basics of RISC VISA
3. 4:57Terminology in SiFive Boards
4. 7:58Booting SiFive Kernel
5. 12:26Early boot in SiFive Boards
6. 16:37setup_arch in SiFive
7. 20:51SMP init in SiFive Linux
8. 21:30Shut Down using SBI
9. 22:18Traps in SiFive Kernel
10. 25:24Timer Interrupt in SiFive Kernel
11. 26:15Paging & MMU in SiFive
12. 29:08SiFive Kernel on Qemu
13. 31:22Reference

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