MiniJava on RISC-V: A Game of Global Compilers Domination
summary
MiniJava compiles to real RISC-V boards by replacing Appel/Palsberg’s ARM-focused instruction selection and register allocation with RISC-V-specific code, running student output on embedded Xinu instead of simulators. A minimal mark and sweep garbage collector is added for hands-on experiments. Materials are modular so instructors can pick phases, a dynamic assessor reports each group’s phase, and class size rises from ~10–12 to 17–18 students, with RISC-V chosen for its six instruction formats and ~393‑page spec.
AI-written summary · about
chapters (13)
- 0:00MiniJava on RISC-V intro
- 1:02Changing landscape of computer science education
- 3:10Decline of compilers courses
- 5:37Challenges in course materials
- 8:22Why MiniJava
- 9:46Extending Appel’s framework
- 11:32RISC-V education benefits
- 14:22Porting Embedded Zinu
- 16:26MiniJava to RISC-V
- 18:35Teaching garbage collection
- 20:20Modernizing course materials
- 21:46Future modular compiler system
- 22:30Q&A
related talks
14mA RISCy Approach to Microprocessor Technology
36mAccelerate RISC-V Instruction Set Simulation by Tiered JIT Compilation
14mRISC-V for Gaming: Emulating X86 on RISC-V
17mDemo: RISC-V Models for Verification, Software Development and Architectural Explor...
19mRISC V For Heterogeneous Computing
44mBuild Your Own VM with JIT Compilation for Dummies
17mRecent Developments in Optimizing Compilers for RISC-V
15mCompared Analysis of GCC Codegen for AArch64 and RISC-V