Meet the Family: RFNoC Blocks in UHD
summary
UHD 4.0 revamps RFNoC so the USRP FPGA can run many ready-made DSP blocks: add/sub, log‑power, moving‑average, FIR/IIR/window, DDC/DUC, FFT, a replay block with example on X310/N310, phosphor visualization for histogram+waterfall output, split/switchboard routing and a null source. Blocks support Verilog/VHDL/HLS, have 32‑bit block IDs, runtime properties and YAML image options to trade FPGA resources (e.g. reloadable coefficients off to save multipliers). Examples and tests are provided.
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chapters (10)
- 0:00Introduction
- 1:00RFNoC Overview
- 8:20Mathematical Computation
- 13:00RFNoC Block
- 14:47KeepInN Block
- 15:18SplitStream Block
- 16:32switchboard Block
- 17:56FFT Block
- 20:30Phosphor Block
- 22:25Hits and Tips
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