Revitalizing the Forgotten On-Chip DMA to Expedite Data Movement in NVM-based Storage
summary
Claims that reviving the on-chip DMA plus CPU cooperation cuts DRAM↔NVM data-movement cost and lowers the I/O size threshold (reads benefit above ~32 KB, writes above ~16 KB). Implements a kernel-side engine called Fastmove with DAX file-system integration and simple APIs, evaluated with MySQL (TPC-C), GraphWalker, and Filebench atop NOVA, ext4-DAX, XFS-DAX on an Intel/DCPMM platform. Reports 1.13–2.16× TPC-C throughput, 17.7–60.8% latency reduction, 37.1–68.9% CPU savings, 39.7–53.4% faster graph runs; the system is built and effective.
AI-written summary · about
chapters (13)
- 0:00Start
- 1:33Outline
- 2:01NVM-based Storage Systems
- 6:43Understanding DMA with NVM
- 10:16High Performance DMA Module
- 11:03DMA-CPU Cooperated Bulk Reads
- 12:37Light-weight scheduler
- 13:41Implementation of Fastmove
- 14:24Experimental Setup
- 14:59Latency Threshold Choices
- 15:47Breakdown Analysis
- 16:30Overall Performance
- 17:03More Evaluations and Analysis in Paper