Imperas Presentation

on YouTube ↗08m

" summary

Shows using Imperas’ instruction-accurate simulator to profile a full C application, find hot spots, and convert hot routines into C-modeled RISC-V custom instructions, with the ChaCha20 example quantified end to end. Workflow includes cycle-accurate timing annotations, simulation of timing-annotated cycles, trace and block-level debug, code and line coverage, compliance tests, and auto-generated documentation for handoff. Compares baseline vs custom-instruction performance and iterates until the instruction set and timing meet target gains.

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" chapters (12)

1. 0:00Introduction
2. 0:46Two types of developers
3. 1:12Custom instructions
4. 2:19Design flow
5. 3:07Development environment
6. 3:25Custom instruction simulation
7. 4:03Custom instruction performance
8. 5:26Debugging
9. 6:16Further analysis
10. 6:46Documentation
11. 7:13Summary
12. 7:36Outro

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