Exploring the Design Space of Page Management for Multi-Tiered Memory Systems

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" summary

Linux 5.3 is modified and evaluated on a two-socket system combining DRAM and Intel DCPMM to expose page placement choices. The design implements AutoTiering-CPM (conservative promotion/migration) and AutoTiering-OPM (opportunistic demotion plus background promotion), chooses victims by per-page recent-access history, reserves three DRAM pages to hide demotion latency, and measures up to ~7x speedup on Graph500 and significant gains across SPEC and graph workloads by exploiting memory-tier performance rather than locality alone.

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" chapters (14)

1. 0:00Intro
2. 0:29Large Memory Systems
3. 1:26Multi-tiered Memory Systems
4. 2:43Need for Page Placement in Multi-Tiered Memory
5. 4:00Need for Page Reclamation in Multi-Tiered Memory
6. 5:14Exploiting Access Tier and Locality
7. 7:46Demotion of Least Accessed Page
8. 8:56Estimating Least Accessed Page
9. 10:10Hiding Latency of Page Demotion
10. 10:54Experimental Environments
11. 11:13Performance Evaluation
12. 12:26Effectiveness of AutoTiering-CPM
13. 12:57Effectiveness of LAP classification
14. 13:51Conclusion