What’s next for memory safety?
summary
CHERI is a hardware capability architecture that replaces raw pointers with a CHERI capability pointer carrying bounds, permissions and provenance so the hardware forbids growing bounds or elevating permissions. Recompiling legacy C/C++ and unsafe Rust largely yields spatial and temporal safety with 1–2% memory overhead; Microsoft estimates 2/3 of vulnerabilities eliminated. Pilots port six million lines in three months; a Chromium port (46M LOC) took one person ~1.5 years and prevented recent WebP CVEs with zero code changes.
AI-written summary · about
chapters (15)
- 0:00Memory safety challenges
- 1:26Heartbleed buffer over-read
- 3:11Why memory-safe languages fail
- 4:15Cherry capability architecture
- 6:23Benefits of capability security
- 7:49Efficient compartmentalization
- 8:32Microsoft vulnerability reduction
- 9:14Porting codebases to Cherry
- 10:57Commercial deployment support
- 12:03Hardware implementations
- 13:46Cherry Alliance collaboration
- 14:30Academic government recognition
- 15:15Cherry for C/C++ safety
- 16:40Performance vs security
- 17:23Secure systems business model
related talks
31mMemory Safety: The Pernicious Challenge
25mLightning Talk: Protecting Zephyr Against Memory Safety Vulnerabilities With the New CHERI Hardware Architecture- 25mLightning Talk: Protecting Zephyr Against Memory Safety Vulnerabilities With the New CHERI Hardware Architecture
17mHardening Linux and FreeBSD on RISC-V with CHERI
32mBuilding in cyber resilience
20mMaking CHERI Accessible
10mCHERI in out-of-order microarchitectures
53mLinux and CHERI: Back to the Future