~/talk

Multi-core Application Development with Zephyr RTOS

slides:none on file

Zephyr now runs on multi‑core boards using shared memory and cross‑core interrupts, with SMP ports for x86 (QEMU), NXP/ESP boards and initial Xtensa support; it adds atomic ops, spinlocks and a simple global SMP lock plus task pinning for the cooperative scheduler. A homemade Pi-ish compute benchmark shows near‑linear speed‑up for long, CPU‑bound threads but real workloads (an MBC test) often give little or no gain. Tooling and tests are sparse, more architectures and benchmarks are still needed.

AI-written summary · about

  1. 0:00Intro
  2. 1:53Why go multicore?
  3. 4:34Examples of multicore solutions
  4. 5:48Modern heterogeneous SoC
  5. 7:55Multicore support models SMP
  6. 13:00OpenAMP in Zephyr cond
  7. 14:57SMP in Zephyr current status
  8. 18:34Changes required to support SMP in Zephyr
  9. 21:18Hardware requirements for SMP
  10. 24:12Challenges designing application for SMP system
  11. 25:43Evaluation of SMP benefits for real applications
  12. 27:07Conclusion
  13. 28:53Utilization of multiple cores in SMP system is easy
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