Multi-core Application Development with Zephyr RTOS
summary
Zephyr now supports both AMP and SMP on real boards and QEMU with shared memory and cross‑core interrupts for coordination, slave‑core init, atomic ops and spinlocks implemented, and a global SMP lock used as a pragmatic default. Task pinning exists for the simple scheduler (spinlocks and per‑CPU pinning). A custom Pi benchmark shows near‑linear scaling on heavy compute but poor gains for fine‑grained tasks; more ports, tests and better scheduler work remain.
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chapters (13)
- 0:00Intro
- 1:53Why go multicore?
- 4:34Examples of multicore solutions
- 5:48Modern heterogeneous SoC
- 7:55Multicore support models SMP
- 13:00OpenAMP in Zephyr cond
- 14:57SMP in Zephyr current status
- 18:34Changes required to support SMP in Zephyr
- 21:18Hardware requirements for SMP
- 24:12Challenges designing application for SMP system
- 25:43Evaluation of SMP benefits for real applications
- 27:07Conclusion
- 28:53Utilization of multiple cores in SMP system is easy
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