High-Performance Hardware Design with Hardcaml
summary
Hardcaml is an OCaml embedded DSL that implements a seven primitives core API and uses a syntax‑directed compiler to emit RTL and also alternate interpretations (combinational simulator, formal checks). It composes high‑level generators into real hardware, ships simulators including cycle-sim/verilator, and integrates with OCaml tooling at Jane Street. The design lets one add features like clock‑domain tracking by reinterpreting primitives, and the open‑source toolchain already produces usable RTL and working simulations.
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chapters (12)
- 0:00Introduction
- 1:28Building embedded HDL from scratch
- 4:59Recipe for embedded HDLs
- 6:23Signal type in detail
- 9:33Computational graphs and signals
- 10:17Compiling to RTL
- 12:47Building a simulator
- 14:55Interpreting primitives for tools
- 15:38HardCaml’s base types and API
- 17:26Q&A: DSLs and hardware trade-offs
- 20:17Q&A: Stateful graphs
- 21:20Q&A: Custom primitives
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