Hardware security evaluation of Intel MAX 10 FPGAs
summary
Evaluation targets Intel MAX 10 FPGAs and shows concrete weaknesses: backside polishing plus optical inspection reveals unusually large flash cells (≈0.25×0.5 µm) and lets an IR laser flip security fuses from protected to unprotected; a test rig with JTAG adapter and a 50 mW infrared laser finds tiny fuse-sensitive spots and timing windows around TCK. Non‑invasive experiments show power‑analysis can recover ~97% extraction after interrupted erase, and EM and power‑glitching parameters and diode limitations determine whether faults are reliable; attacks work but need lasers, chemicals and precise hardware.
AI-written summary · about
chapters (16)
- 0:00Introduction to hardware
- 1:14Hardware security challenges
- 1:46Intel MAX 10 FPGA security
- 3:25Security architecture review
- 5:51Bitstream and fuse analysis
- 8:13Attack methodology overview
- 10:37Chemical and physical safety
- 15:02Semi-invasive fault injection
- 18:05Laser safety and optics
- 20:49Non-invasive analysis
- 26:56Electromagnetic and glitching
- 29:45Electromagnetic pulse challenges
- 36:55Diode analysis for pulses
- 45:58Pulse injection results
- 48:13Conclusions and future work
- 51:44Q&A and closing remarks
related talks
48mFatal Fury on ESP32: Time to Release Hardware Exploits
24mSecurity through Transparency: Tales from the RP2350 Hacking Challenge
44mSilicon Under Attack Physical Exploitation Of Modern Chips
32mSecSi Product Development
45mIntegrated Circuit Offensive Security
23mExtraction of Secrets from 40nm CMOS Gate Dielectric Breakdown Antifuses by FIB...
28mComplexity Killed Security
33mSecuring the Unseen: Vulnerability Research in Confidential Computing